# SAM3S8 MATRIX

## AHB Bus Matrix (MATRIX) User Interface

### Registers

Register Mapping
Address | Register | Name | Access | Reset
--- | --- | --- | --- | ---
0x400E0200 | Master Configuration Register | MATRIX_MCFG[4] | read-write | 0x0
0x400E0240 | Slave Configuration Register | MATRIX_SCFG[5] | read-write | 0x0001001000050010000000100000001000000010
0x400E0280 | Priority Register A for Slave 0 | MATRIX_PRAS0 | read-write | 0x00000000
0x400E0288 | Priority Register A for Slave 1 | MATRIX_PRAS1 | read-write | 0x00000000
0x400E0290 | Priority Register A for Slave 2 | MATRIX_PRAS2 | read-write | 0x00000000
0x400E0298 | Priority Register A for Slave 3 | MATRIX_PRAS3 | read-write | 0x00000000
0x400E02A0 | Priority Register A for Slave 4 | MATRIX_PRAS4 | read-write | 0x00000000
0x400E0314 | System I/O Configuration register | MATRIX_SYSIO | read-write | 0x00000000
0x400E031C | SMC Chip Select NAND Flash Assignment Register | MATRIX_SMCNFCS | read-write | 0x00000000
0x400E03E4 | Write Protect Mode Register | MATRIX_WPMR | read-write | 0x00000000
0x400E03E8 | Write Protect Status Register | MATRIX_WPSR | read-only | 0x00000000

### Register Fields

#### MATRIX Master Configuration Register

Name: MATRIX_MCFG[0:3]

Access: read-write

Address: 0x400E0200

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24
- | - | - | - | - | - | - | -
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16
- | - | - | - | - | - | - | -
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8
- | - | - | - | - | - | - | -
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
- | - | - | - | - | ULBT

- ULBT: Undefined Length Burst Type

  Value | Name | Description
  --- | --- | ---
  0x0 | - | Infinite Length Burst
  0x1 | - | Single Access
  0x2 | - | Four Beat Burst
  0x3 | - | Eight Beat Burst
  0x4 | - | Sixteen Beat Burst

#### MATRIX Slave Configuration Register

Name: MATRIX_SCFG[0:4]

Access: read-write

Address: 0x400E0240

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24
- | - | - | - | - | - | ARBT
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16
- | - | - | FIXED_DEFMSTR | DEFMSTR_TYPE
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8
- | - | - | - | - | - | - | -
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
SLOT_CYCLE

- SLOT_CYCLE: Maximum Number of Allowed Cycles for a Burst

-

- DEFMSTR_TYPE: Default Master Type

  Value | Name | Description
  --- | --- | ---
  0x0 | - | No Default Master
  0x1 | - | Last Default Master
  0x2 | - | Fixed Default Master

- FIXED_DEFMSTR: Fixed Default Master

-

- ARBT: Arbitration Type

  Value | Name | Description
  --- | --- | ---
  0x0 | - | Round-Robin Arbitration
  0x1 | - | Fixed Priority Arbitration
  0x2 | - | Reserved
  0x3 | - | Reserved

#### MATRIX Priority Register A for Slave 0

Name: MATRIX_PRAS0

Access: read-write

Address: 0x400E0280

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24
- | - | - | - | - | - | - | -
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16
- | - | - | - | - | - | M4PR
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8
- | - | M3PR | - | - | M2PR
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
- | - | M1PR | - | - | M0PR

- M0PR: Master 0 Priority

-

- M1PR: Master 1 Priority

-

- M2PR: Master 2 Priority

-

- M3PR: Master 3 Priority

-

- M4PR: Master 4 Priority

-

#### MATRIX Priority Register A for Slave 1

Name: MATRIX_PRAS1

Access: read-write

Address: 0x400E0288

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24
- | - | - | - | - | - | - | -
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16
- | - | - | - | - | - | M4PR
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8
- | - | M3PR | - | - | M2PR
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
- | - | M1PR | - | - | M0PR

- M0PR: Master 0 Priority

-

- M1PR: Master 1 Priority

-

- M2PR: Master 2 Priority

-

- M3PR: Master 3 Priority

-

- M4PR: Master 4 Priority

-

#### MATRIX Priority Register A for Slave 2

Name: MATRIX_PRAS2

Access: read-write

Address: 0x400E0290

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24
- | - | - | - | - | - | - | -
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16
- | - | - | - | - | - | M4PR
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8
- | - | M3PR | - | - | M2PR
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
- | - | M1PR | - | - | M0PR

- M0PR: Master 0 Priority

-

- M1PR: Master 1 Priority

-

- M2PR: Master 2 Priority

-

- M3PR: Master 3 Priority

-

- M4PR: Master 4 Priority

-

#### MATRIX Priority Register A for Slave 3

Name: MATRIX_PRAS3

Access: read-write

Address: 0x400E0298

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24
- | - | - | - | - | - | - | -
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16
- | - | - | - | - | - | M4PR
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8
- | - | M3PR | - | - | M2PR
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
- | - | M1PR | - | - | M0PR

- M0PR: Master 0 Priority

-

- M1PR: Master 1 Priority

-

- M2PR: Master 2 Priority

-

- M3PR: Master 3 Priority

-

- M4PR: Master 4 Priority

-

#### MATRIX Priority Register A for Slave 4

Name: MATRIX_PRAS4

Access: read-write

Address: 0x400E02A0

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24
- | - | - | - | - | - | - | -
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16
- | - | - | - | - | - | M4PR
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8
- | - | M3PR | - | - | M2PR
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
- | - | M1PR | - | - | M0PR

- M0PR: Master 0 Priority

-

- M1PR: Master 1 Priority

-

- M2PR: Master 2 Priority

-

- M3PR: Master 3 Priority

-

- M4PR: Master 4 Priority

-

#### MATRIX System I/O Configuration register

Name: MATRIX_SYSIO

Access: read-write

Address: 0x400E0314

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24
- | - | - | - | - | - | - | -
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16
- | - | - | - | - | - | - | -
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8
- | - | - | SYSIO12 | SYSIO11 | SYSIO10 | - | -
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
SYSIO7 | SYSIO6 | SYSIO5 | SYSIO4 | - | - | - | -

- SYSIO4: PB4 or TDI Assignment

  Value | Name | Description
  --- | --- | ---
  1 | - | PB4 function selected.

- SYSIO5: PB5 or TDO/TRACESWO Assignment

  Value | Name | Description
  --- | --- | ---
  1 | - | PB5 function selected.

- SYSIO6: PB6 or TMS/SWDIO Assignment

  Value | Name | Description
  --- | --- | ---
  1 | - | PB6 function selected.

- SYSIO7: PB7 or TCK/SWCLK Assignment

  Value | Name | Description
  --- | --- | ---
  1 | - | PB7 function selected.

- SYSIO10: PB10 or DDM Assignment

  Value | Name | Description
  --- | --- | ---
  1 | - | PB10 function selected.

- SYSIO11: PB11 or DDP Assignment

  Value | Name | Description
  --- | --- | ---
  1 | - | PB11 function selected.

- SYSIO12: PB12 or ERASE Assignment

  Value | Name | Description
  --- | --- | ---
  1 | - | PB12 function selected.

#### MATRIX SMC Chip Select NAND Flash Assignment Register

Name: MATRIX_SMCNFCS

Access: read-write

Address: 0x400E031C

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24
- | - | - | - | - | - | - | -
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16
- | - | - | - | - | - | - | -
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8
- | - | - | - | - | - | - | -
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
- | - | - | - | SMC_NFCS3 | SMC_NFCS2 | SMC_NFCS1 | SMC_NFCS0

- SMC_NFCS0: SMC NAND Flash Chip Select 0 Assignment

  Value | Name | Description
  --- | --- | ---
  1 | - | NCS0 is assigned to a NAND Flash (NANDOE and NANWE used for NCS0)

- SMC_NFCS1: SMC NAND Flash Chip Select 1 Assignment

  Value | Name | Description
  --- | --- | ---
  1 | - | NCS1 is assigned to a NAND Flash (NANDOE and NANWE used for NCS1)

- SMC_NFCS2: SMC NAND Flash Chip Select 2 Assignment

  Value | Name | Description
  --- | --- | ---
  1 | - | NCS2 is assigned to a NAND Flash (NANDOE and NANWE used for NCS2)

- SMC_NFCS3: SMC NAND Flash Chip Select 3 Assignment

  Value | Name | Description
  --- | --- | ---
  1 | - | NCS3 is assigned to a NAND Flash (NANDOE and NANWE used for NCS3)

#### MATRIX Write Protect Mode Register

Name: MATRIX_WPMR

Access: read-write

Address: 0x400E03E4

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24
WPKEY
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16
WPKEY
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8
WPKEY
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
- | - | - | - | - | - | - | WPEN

- WPEN: Write Protect ENable

  Value | Name | Description
  --- | --- | ---
  0 | - | Disables the Write Protect if WPKEY corresponds to 0x4D4154 ("MAT" in ASCII).
  1 | - | Enables the Write Protect if WPKEY corresponds to 0x4D4154 ("MAT" in ASCII).

- WPKEY: Write Protect KEY (Write-only)

-

#### MATRIX Write Protect Status Register

Name: MATRIX_WPSR

Access: read-only

Address: 0x400E03E8

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24
- | - | - | - | - | - | - | -
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16
WPVSRC
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8
WPVSRC
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
- | - | - | - | - | - | - | WPVS

- WPVS: Write Protect Violation Status

  Value | Name | Description
  --- | --- | ---
  0 | - | No Write Protect Violation has occurred since the last write of MATRIX_WPMR.
  1 | - | At least one Write Protect Violation has occurred since the last write of MATRIX_WPMR.

- WPVSRC: Write Protect Violation Source

-